v0.7.4 - 2021-12-31

Added

• Added support for additional DWT counters (#349)
  • CPI counter
  • Exception overhead counter
  • LSU counter
  • Folded-instruction counter
• Added DWT.set_cycle_count (#347).
• Added support for the Cortex-M7 TCM and cache access control registers. There is a feature cm7 to enable access to these (#352).
• Add derives for serde, Hash, and PartialOrd to VectActive behind feature gates for host-platform use (#363).
• Support host platforms besides x86_64 (#369).
• Added delay::Delay::with_source, a constructor that lets you specify the SysTick clock source (#374).

Fixed

• Fix incorrect AIRCR PRIGROUP mask (#338, #339).
• Fix nightly users of inline-asm breaking now that the asm macro is removed from the prelude (#372).

Deprecated

• DWT::get_cycle_count has been deprecated in favor of DWT::cycle_count. This change was made for consistency with the C-GETTER convention. (#349)