New
FIRRTL v1.5.2
BugFix
- Fix handling of modulus (rem) on SInts (#2485)
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Changelog
Flexible Intermediate Representation for RTL
Last updated almost 2 years ago
♞ lichess.org: the forever free, adless and open source chess server ♞
💾 Database Tools incl. ORM, Migrations and Admin UI (Postgres, MySQL & MongoDB) [deprecated]
Scala 2 compiler and standard library. Scala 2 bugs at https://github.com/scala/bug; Scala 3 at https://github.com/scala/scala3