More scaladoc by @mrcmry in https://github.com/SpinalHDL/SpinalHDL/pull/1719
Enhance ROM test cases to make them more maintainable and easier to extend by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1721
Introduce a null-check within the PhaseRemoveUselessStuff phase by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1726
add more fine control over RTL code obfuscation. by @facebreeze in https://github.com/SpinalHDL/SpinalHDL/pull/1725
Fix typo in 'isFireing' to 'isFiring' across multiple sources by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1723
Fix AFix <<| bug by @thajohns in https://github.com/SpinalHDL/SpinalHDL/pull/1730
fix width issue in AFix negate() by @thajohns in https://github.com/SpinalHDL/SpinalHDL/pull/1729
Add IEEE 754 and RecFloating testing utility functions and FloatingTester2 that tests BigDecimal assign operator by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1728
Fix strb of Axi4Master (spinal.lib.bus.amba4.axi.sim) by @Nik-Sch in https://github.com/SpinalHDL/SpinalHDL/pull/1692
Enhances hierarchy violation report within PhaseCheckHierarchy phase by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1733
Fix scala 2.13 Seq naming by @Nik-Sch in https://github.com/SpinalHDL/SpinalHDL/pull/1738
Enhancements to make report statements more readable and flexible by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1735
Improve error handling in getNameElseThrow to provide clearer context when a signal lacks a name by @pluveto in https://github.com/SpinalHDL/SpinalHDL/pull/1740
Modify and Supplement the Bmb2Dfi used to Implement the DDRx Controller by @liyaohou in https://github.com/SpinalHDL/SpinalHDL/pull/1732
add slice to Vec, which fix #1077 by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1745
RegIf Chead/SVHeader reuseBlock offset bugfix by @jijingg in https://github.com/SpinalHDL/SpinalHDL/pull/1748
Polish Database APIs and better scaladoc comments by @KireinaHoro in https://github.com/SpinalHDL/SpinalHDL/pull/1752
run test base on the image in specified version. by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1758
add test for verilator 5 on CI. by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1759
CI:Add disk space optimization for Verilator 5.x CI tests by @jaynerlin in https://github.com/SpinalHDL/SpinalHDL/pull/1756
fix(sim): Fix EXCEPTION_ACCESS_VIOLATION when calling doSim multiple times with Verilator v5.x+ by @jaynerlin in https://github.com/SpinalHDL/SpinalHDL/pull/1757
classify psl based test case more precise. by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1764
avoid to use > in dir name. by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1765
Port Vivado constraint writer to the new TimingExtractor framework by @KireinaHoro in https://github.com/SpinalHDL/SpinalHDL/pull/1751
Fixed write address error in RegIf when calling AxiLite4's MemBus. An… by @fpgacastro in https://github.com/SpinalHDL/SpinalHDL/pull/1766
assume ghdl frontend of yosys is compiled within on Windows, just as … by @Readon in https://github.com/SpinalHDL/SpinalHDL/pull/1760
Support inout in AnalysisUtils (for VivadoConstraintWriter) by @craigjb in https://github.com/SpinalHDL/SpinalHDL/pull/1769
Add optional 32-bit sysbus to RiscV DebugModule by @craigjb in https://github.com/SpinalHDL/SpinalHDL/pull/1768
Fix CI disk overflow in Verilator v5.018+ by disabling precompiled headers by @jaynerlin in https://github.com/SpinalHDL/SpinalHDL/pull/1774
Enable nested FiberPlugin by @cxzzzz in https://github.com/SpinalHDL/SpinalHDL/pull/1781
Fixed the problem of process hanging indefinitely after the simulation is over in Windows environment by @jaynerlin in https://github.com/SpinalHDL/SpinalHDL/pull/1773
Revert "fix(sim): Prevent JVM crash on repeated doSim with Verilator5.x+" by @jaynerlin in https://github.com/SpinalHDL/SpinalHDL/pull/1785
New Contributors
@jaynerlin made their first contribution in https://github.com/SpinalHDL/SpinalHDL/pull/1756
@fpgacastro made their first contribution in https://github.com/SpinalHDL/SpinalHDL/pull/1766
@craigjb made their first contribution in https://github.com/SpinalHDL/SpinalHDL/pull/1769
@cxzzzz made their first contribution in https://github.com/SpinalHDL/SpinalHDL/pull/1781
Full Changelog: https://github.com/SpinalHDL/SpinalHDL/compare/v1.12.2...v1.12.3